The fabrication of high performance Very Large Scale Integrated (VLSI) devices permits the use of many functions on a single integrated circuit chip. The functional blocks on a single chip must be connected with a variety of other chips in order to receive data and communicate results within a computer system. Communication between chips or functional blocks is faster when the data is transmitted in parallel over a large number of interconnections. The electrical behavior of interconnections between functional blocks on a single chip is different than the behavior of interconnections between chips. The electrical resistance, capacitance, and inductance associated with packaging and interconnecting multiple chips affects the switching transitions of the signals sent between chips. Therefore, output drivers are used to compensate for these effects.
The output drivers make the signal voltage on the output driver as low as possible for a first logic state (i.e., logic 0)and as high as possible for a second logic state (i.e., logic 1). Often, the output driver signal swing voltage is made larger than signals between functional blocks on a single chip because there is more noise between chips. Additionally, the transition time for switching between the two logic states is shortened. Typically, strengthening the signal by providing both a short transition time and large output voltage swing is accomplished by modifying the output driver device size and the connections between the output driver and the logic circuits to provide more current. The same considerations which lead to the modification of the output driver also lead to the modification of the input receiver. The receiver is modified to respond to the large voltage swing over a short transition time. Generally, both input and output functions are incorporated into a single input/output device.
The stronger output signal coupled with a large number of output signals switching in parallel produces a noise problem on a single chip. Part of the noise problem is a result of a change in the current required by the input/output devices when many input/output devices are switched at once. The effects of the changes in current, also called current spikes, on the input/output devices vary depending on the placement of the drivers with respect to the power supply pins on the chip and the design of the power supply bussing. This is because current spikes must pass through the power supply bussing and its parasitic impedance. The placement of a switching input/output device with respect to the power supply pins changes the impedance which the current spikes encounter. Therefore, the voltage dropped across the impedance varies and this produces different effects on the input/output devices and other circuits near the input/output devices. In particular, when a current spike (noise) becomes large enough over a small enough impedance, an input/output device may (depending on its position) switch its logical state unintentionally.
In an effort to reduce overall chip power consumption, the power supply bussing on a chip has the lowest impedance that is practical. A low impedance aggravates the noise problem because the current spike is not damped as it travels through the bussing so that it effects more circuits. Both a larger current spike and smaller impedances are likely when several input/output devices operate in parallel. Therefore, enhancing the signal speed and number of parallel input/output devices makes the chip communication more unreliable because the signals sent may not be correct due to the current noise (also called Delta I noise) in the power supply.
Another part of the Delta I noise is that the current spike is an AC signal capacitively coupled to adjacent input/output devices through the parasitic capacitances between the input/output devices. The placement of the input/output devices determines the impedance through which the current spike passes. This impedance and size of the current spike determine the strength of the voltage signal capacitively coupled to the adjacent devices. If enough voltage is coupled to an adjacent input/output device through several input/output devices switching to one state simultaneously, and therefore having a cumulative effect, then the adjacent input/output device will switch logical state unintentionally. Again, switching logic signals are made more unreliable because of the Delta I noise.
The prior art discloses many solutions to this problem. A first solution is to reduce the speed of the transitions between logic states of the input/output device. The problem with this solution is that the performance of the chip would be limited by the Delta I noise. Another prior art solution is to filter out the current spikes. This technique is effective, however it can be prohibitively expensive because of packaging costs. Still another solution to the Delta I noise problem is to modify the parasitic elements on the power supply bussing for the chip itself. Typically, this is done by using several input/output pins on the chip (rather than a single pin) for power supply connections. However, the number of input/output pins on a VLSI logic chip is generally limited. Therefore, the functionality of the chip is limited because the number of pins useful for logic signals is limited due to allocating extra pins for the power supply.